1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to data processing systems which support speculative execution.
2. Description of the Prior Art
It is known to provide processing systems which support speculative execution. In such systems a sequence of program instructions are executed. This sequence of program instructions may include instructions which can be followed by a plurality of alternative instructions serving as a next programme instruction. These correspond to a speculation nodes within the speculative sequence of program instructions being executed. Sequences of program instructions between speculation nodes are segments of program instructions. The speculation nodes may, for example, correspond to conditional branch instructions, load/store instructions, which may abort, or other instructions for which there is the possibility that more than one instruction can serve as the next program instruction to be executed. Speculative execution in this way is desirable as it assists in increasing instruction execution throughput, such as by facilitating deep instruction pipelines, out-of-order execution and other techniques promoting parallelism.
A technique which assists in supporting speculative execution is register renaming. When a register is written and it is not certain that non-speculative execution will reach that point, then a new physical register is mapped to the architectural register being written so that the old value within that register may be preserved within the system should it need to be restored. Such register renaming techniques will be familiar to those in this technical field and are effective in supporting speculative and out-of-order processing. A problem with such register renaming techniques which allocate a new register each time a speculative change is made to a register value is that large numbers of registers need to be provided—this corresponds to a disadvantageous resource overhead.
It is also known within some data processing systems to support sticky bits. Sticky bits are typically used as flags to represent the occurrence of events during a window of program execution. As an example, a sticky bit may be used to represent the occurrence of a particular exception condition during execution of any of a sequence of program instructions within a given window. A first outcome of the execution of an individual instruction may be that the exception does not occur and a second outcome of that execution of the instruction is that the exception does occur. In the case of the first outcome, the sticky bit is left unchanged independent of whether or not it has its initial value or its sticky value. In the case of the second outcome, the sticky bit is set to the sticky value independent of whether the sticky bit has its initial value or the sticky value. Thus, once the sticky bit is changed from the initial value to the sticky value by a second outcome for any of the instructions for which it is monitoring for the occurrence of exceptions, then the sticky bit will maintain the sticky value and indicate that an exception occurred within one of those instructions. Sticky bits may, for example, be used in monitoring for certain types of exceptional behaviour within floating point processing pipelines, but other uses of sticky bits are also possible within data processing systems in general.
Combining the use of sticky bits with register renaming may lead to a solution in which as each event can result in an outcome that changes the sticky bit value, a new register is allocated to represent that possible new sticky bit value for each event and each instruction. While such an approach does allow state to be restored if the speculation fails, it suffers from the disadvantage of consuming significant resource to store all of the potential different event outcomes.
Another possibility is that when an event occurs that can update the sticky bit, then speculation beyond that event is not permitted, so as to avoid the need to register rename in respect of sticky bit values. This approach has the disadvantage of restricting the amount of speculation that can be performed.